Basic PLL Operation
A basic Phase Locked Loop (PLL) consists of
a Voltage Controlled Oscillator (VCO), a Phase Sensitive Detector
(PSD), a Reference Oscillator and a Low-Pass Loop Filter.
The frequency of the VCO is monitored by the PSD which outputs an error
voltage proportional to the difference in phase between the reference signal
and the VCO output. The reference signal is usually a very stable
frequency source like a crystal oscillator. The low-pass filter at the
output of PSD generates a DC voltage which controls the VCO. When the
PLL loop is in "locked" state, the frequency of VCO equals the reference
frequency.

Generating Multiple Frequencies
If we insert a Divide-by-N
counter between the VCO output and the PSD input like this

Then by PLL action F/N = Reference
Frequency. So F = N * Reference Frequency.
Thus we can generate many frequencies from only one stable frequency source
by varying the dividing ratio N of the Divide-by-N counter.
My PLL Synthesizer
< to be completed soon >
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